Heterogenous Integration IO Interposer Architect, Principal Engineer
Location: Richardson
Posted on: June 23, 2025
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Job Description:
Micron Technology is a world leader in innovating memory and
storage solutions that accelerate the transformation of information
into intelligence, inspiring the world to learn, communicate and
advance faster than ever. The High-Performance Integrated Group
(HIG) is a division within the Technology and Products Group (TPG).
We are dedicated to developing and optimizing High Bandwidth Memory
(HBM) solutions for AI and ML applications. Our ultimate goal is to
deliver the lowest power per bit solutions in the industry!
Position Overview: The role involves HBM architecture and analysis
with modeling and development of high-speed interface, interposer,
power distribution networks (PDN) partnering with IO design in
next-generation HBM products. In this position, you will be
responsible for the pathfinding , design analysis, development,
design, optimization, and verification. You will be part of a
highly multi-functional team of technical domain experts
collaborating closely with a distributed team of Design
Engineering, Product Engineering, Process Development, Package
Engineering & Business Units to implement a common goal of ensuring
our future HBM roadmap is successful. Responsibilities will
include, but are not limited to: • Analyze HBM cube PDN integration
partnering with IO design • Pathfinding to explore new HBM
architectures, interposer design and modeling for future HBM
products and make recommendations after performing highly technical
feasibility analyses • Develop the HBM PHY interface analysis with
PDN integrated environment • Establish signal integrity and power
integrity guidelines for end-to-end die to interposer to substrate
level heterogenous integrated systems • Parasitic modeling and
design validation, reticle experiments and required tape-out
revisions • Maintain technical expertise and provide training •
Contribute to cross group communication to work towards
standardization and group success • Drive innovation into the
future Memory generation with dynamic work environment • Work with
HBM memory and IO design teams to ensure HBM product meet industry
leading speed, power, cost, and quality metrics Successful
candidates for this position will have: • Strong theoretical and
practical knowledge in SI/PI/EMI • Extensive background in Signal
and Power Integrity, with a focus on I/O circuit and signaling
performance • Proficiency with simulation tools like Q3D, SIWAVE,
HFSS, HSPICE, ADS • Good knowledge of CMOS circuit design, device
physics, analog and mixed-signal circuit with experience in
high-speed link, ESD • Familiar with one or more off-chip protocols
such as HBM, UCIe or other DRAM • Experience with circuit
verification and optimization including layout verification and
parasitic extractions of the circuits • Good understanding on
timing/area/power/complexity tradeoffs on sophisticated interface
design • Experience with interposer design and modeling such as
CoWoS, EMIB, etc is preferred • Handy scripting languages,
including Python, Tcl, Perl, ACE, and shell is a plus • Experience
with industry-standard tools such as Cadence ADE, Spectre, AMS
verification, EM/IR flows, MATLAB, Calibre, etc. • Understanding of
device physics and basic CMOS processing techniques and BSIM model
preferred • Excellent problem-solving and analytical skills •
Strong communication skills with the ability to convey
sophisticated technical concepts to other design peers both
verbally and written Required Experience: • BSEE or greater • 7
years of relevant technical expertise
Keywords: , Keller , Heterogenous Integration IO Interposer Architect, Principal Engineer, Engineering , Richardson, Texas
